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 1.3 CMOS, 1.8 V to 5.5 V Single SPDT Switch/2:1 MUX in SOT-66 Package ADG859
FEATURES
1.8 V to 5.5 V single supply Tiny 1.65 mm x 1.65 mm package Low on resistance: 1.3 at 5 V supply High current-carrying capability 300 mA continuous current 500 mA peak current at 5 V Rail-to-rail operation Typical power consumption: <0.01 W TTL/CMOS-compatible inputs
FUNCTIONAL BLOCK DIAGRAM
ADG859
S2 D S1 IN
05258-001
SWITCHES SHOWN FOR A LOGIC 1 INPUT
Figure 1.
APPLICATIONS
Cellular phones PDAs MP3 players Battery-powered systems Audio and video signal routing Modems PCMCIA cards Hard drives Relay replacement
GENERAL DESCRIPTION
The ADG859 is a monolithic, CMOS SPDT (single pole, double throw) switch that operates with a supply range of 1.8 V to 5.5 V. It is designed to offer low on resistance of 2.3 maximum over the entire temperature range of -40C to +125C. The ADG859 also has the capability of carrying large amounts of current, typically 300 mA at 5 V operation. These features make the ADG859 an ideal solution for applications that are space-constrained, such as handsets, PDAs, and MP3 players. Each switch conducts equally well in both directions when on. The device exhibits break-before-make switching action, thereby preventing momentary shorting when switching channels. The ADG859 is available in a tiny 6-lead SOT-66 package.
PRODUCT HIGHLIGHTS
1. 2. 3. Low on resistance: 2.3 maximum over the full temperature range of -40C to +125C. High current-carrying capability. Tiny 6-lead, 1.65 mm x 1.65 mm SOT-66 package.
Rev. 0
Information furnished by Analog Devices is believed to be accurate and reliable. However, no responsibility is assumed by Analog Devices for its use, nor for any infringements of patents or other rights of third parties that may result from its use. Specifications subject to change without notice. No license is granted by implication or otherwise under any patent or patent rights of Analog Devices. Trademarks and registered trademarks are the property of their respective owners.
One Technology Way, P.O. Box 9106, Norwood, MA 02062-9106, U.S.A. Tel: 781.329.4700 www.analog.com Fax: 781.461.3113 (c) 2005 Analog Devices, Inc. All rights reserved.
ADG859 TABLE OF CONTENTS
Specifications..................................................................................... 3 Absolute Maximum Ratings............................................................ 5 ESD Caution.................................................................................. 5 Pin Configuration and Function Descriptions............................. 6 Typical Performance Characteristics ............................................. 7 Test Circuits..................................................................................... 10 Terminology .................................................................................... 12 Outline Dimensions ....................................................................... 13 Ordering Guide .......................................................................... 13
REVISION HISTORY
6/05--Revision 0: Initial Version
Rev. 0 | Page 2 of 16
ADG859 SPECIFICATIONS
VDD = 5 V 10%, GND = 0 V, unless otherwise noted. 1 Table 1.
Parameter ANALOG SWITCH Analog Signal Range On Resistance, RON On Resistance Match Between Channels, RON On Resistance Flatness, RFLAT (ON) LEAKAGE CURRENTS Source Off Leakage, IS (Off) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IINH Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS 2 tON tOFF Break-Before-Make Time Delay, tBBM Charge Injection Off Isolation Channel-to-Channel Crosstalk -3 dB Bandwidth Insertion Loss Total Harmonic Distortion (THD + N) CS (Off) CD, CS (On) POWER REQUIREMENTS IDD 25C -40C to +85C -40C to +125C 0 V to VDD 1.3 2.1 0.01 0.093 0.32 0.45 0.02 0.02 2 0.8 0.005 0.1 4 8 10 4.5 6 4 13 -78 -78 125 -0.11 0.062 18 45 0.001 1 2.2 0.163 0.6 2.3 0.163 0.65 Unit V typ max typ max typ max nA typ nA typ V min V max A typ A max pF typ ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ MHz typ dB typ % pF typ pF typ A typ A max Test Conditions/Comments
VDD = 4.5 V, VS = 0 V to VDD, IS = -100 mA; Figure 16 VDD = 4.5 V, VS = 4.5V, IS = -100 mA; Figure 16 VDD = 4.5 V, VS = 0 V to VDD, IS = -100 mA; Figure 16 VDD = 5.5 V VS = 4.5 V/1 V, VD = 1 V/4.5 V; Figure 17 VS = VD = 1 V or 4.5 V; Figure 18
VIN = VINL or VINH
11 6.5
12 7 1
RL = 50 , CL = 35 pF VS = 3 V; Figure 19 RL = 50 , CL = 35 pF VS = 3 V; Figure 19 RL = 50 , CL = 35 pF VS1 = VS2 = 1.5 V; Figure 20 VS = 0 V, RS = 0 , CL = 1 nF; Figure 21 RL = 50 , CL = 5 pF, f = 100 kHz; Figure 22 RL = 50 , CL = 5 pF, f = 100 kHz; Figure 23 RL = 50 , CL = 5 pF; Figure 24 RL = 50 , CL = 5 pF; Figure 24 RL = 32 , f = 20 Hz to 20 kHz, VS = 3 V p-p; Figure 14 f = 1 MHz f = 1 MHz VDD = 5.5 V Digital inputs = 0 V or 5.5 V
1 2
Temperature range is -40C to +125C. Guaranteed by design; not subject to production test.
Rev. 0 | Page 3 of 16
ADG859
VDD = 2.7 V to 3.6 V, GND = 0 V, unless otherwise noted. 1 Table 2.
Parameter ANALOG SWITCH Analog Signal Range On Resistance, RON On Resistance Match Between Channels, RON RON LEAKAGE CURRENTS Source Off Leakage, IS (Off) Channel On Leakage, ID, IS (On) DIGITAL INPUTS Input High Voltage, VINH Input Low Voltage, VINL Input Current, IINL or IIN Digital Input Capacitance, CIN DYNAMIC CHARACTERISTICS 2 tON tOFF Break-Before-Make Time Delay, tBBM Charge Injection Off Isolation Channel-to-Channel Crosstalk -3 dB Bandwidth Insertion Loss Total Harmonic Distortion (THD + N) CS (Off) CD, CS (On) POWER REQUIREMENTS IDD
1 2
25C
-40C to +85C
-40C to +125C 0 V to VDD
Unit V typ max typ max nA typ nA typ
Test Conditions/Comments
3 4.3 0.03 0.11 0.02 0.05
4.5 0.15
4.7 0.15
VDD = 2.7 V, VS = 0 V to VDD, IS = -100 mA; Figure 16 VDD = 2.7 V, VS = 1.2 V, IS = -100 mA; Figure 16 VDD = 3.6 V VS = 3 V/1 V, VD = 1 V/3 V; Figure 17 VS = VD = 1 V or 3 V; Figure 18
2.0 0.8 0.7 0.005 0.1 4 11 15 6 9.5 5 7 -78 -78 125 -0.11 0.1 18 46 0.001 1 0.1
V min V max V max A typ A max pF typ ns typ ns max ns typ ns max ns typ ns min pC typ dB typ dB typ MHz typ dB typ % pF typ pF typ A typ A max
VDD = 3 V to 3.6 V VDD = 2.7 V VIN = VINL or VINH
16 10
17 11 1
RL = 50 , CL = 35 pF VS = 1.5 V; Figure 19 RL = 50 , CL = 35 pF VS = 1.5 V; Figure 19 RL = 50 , CL = 35 pF VS1 = VS2 = 1.5 V; Figure 20 VS = 0 V, RS = 0 , CL = 1 nF; Figure 21 RL = 50 , CL = 5 pF, f = 100 kHz; Figure 22 S1 to S2; RL = 50 , CL = 5 pF, f = 100 kHz; Figure 23 RL = 50 , CL = 5 pF; Figure 24 RL = 50 , CL = 5 pF; Figure 24 RL = 32 , f = 20 Hz to 20 kHz, VS = 2 V p-p; Figure 14 f = 1 MHz f = 1 MHz VDD = 3.6 V Digital inputs = 0 V or 3.6 V
Temperature range is -40C to +125C. Guaranteed by design; not subject to production test.
Rev. 0 | Page 4 of 16
ADG859 ABSOLUTE MAXIMUM RATINGS
TA = 25C, unless otherwise noted. Table 3.
Parameter VDD to GND Analog Inputs 1 Digital Inputs1 Peak Current, S or D 5 V Operation 3 V Operation Continuous Current, S or D 5 V Operation 3 V Operation Operating Temperature Range Automotive Storage Temperature Range Junction Temperature SOT-66 Package (4-Layer Board) JA Thermal Impedance Lead-Free Reflow Peak Temperature Time at Peak Temperature
1
Rating -0.3 V to +7.0 V -0.3 V to VDD + 0.3 V or 30 mA, whichever occurs first -0.3 V to VDD + 0.3 V or 30 mA, whichever occurs first 500 mA 460 mA 300 mA 275 mA -40C to +85C -65C to +150C 150C 191C/W 260(+0/-5)C 10 sec to 40 sec
Stresses above those listed under Absolute Maximum Ratings may cause permanent damage to the device. This is a stress rating only; functional operation of the device at these or any other conditions above those indicated in the operational section of this specification is not implied. Exposure to absolute maximum rating conditions for extended periods may affect device reliability. Only one absolute maximum rating may be applied at any one time.
Table 4. Truth Table
Logic (IN) 0 1 Switch 2 (S2) Off On Switch 1 (S1) On Off
Overvoltages at S or D are clamped by internal diodes. Current should be limited to the maximum ratings given.
ESD CAUTION
ESD (electrostatic discharge) sensitive device. Electrostatic charges as high as 4000 V readily accumulate on the human body and test equipment and can discharge without detection. Although this product features proprietary ESD protection circuitry, permanent damage may occur on devices subjected to high energy electrostatic discharges. Therefore, proper ESD precautions are recommended to avoid performance degradation or loss of functionality.
Rev. 0 | Page 5 of 16
ADG859 PIN CONFIGURATION AND FUNCTION DESCRIPTIONS
IN 1 VDD 2 6 S2
Figure 2. 6-Lead SOT-66 Pin Configuration
Table 5. Pin Function Descriptions
Pin No. 1 2 3 4 5 6 Mnemonic IN VDD GND S1 D S2 Description Logic Control Input. Most Positive Power Supply Potential. Ground (0 V) Reference. Source Terminal. Can be an input or an output. Drain Terminal. Can be an input or an output. Source Terminal. Can be an input or an output.
Rev. 0 | Page 6 of 16
05258-002
5D TOP VIEW GND 3 (Not to Scale) 4 S1
ADG859
ADG859 TYPICAL PERFORMANCE CHARACTERISTICS
2.0 1.8 1.6 1.4 1.2
RON ()
TA = 25C IDS = 100mA VDD = 4.5V VDD = 5V
ON RESISTANCE ()
3.0 +125C 2.5 +85C
2.0 +25C 1.5 -40C
1.0 0.8 VDD = 5.5V 0.6 0.4
1.0
0 0 1 2 3 VS/VD (V) 4 5
0 0 0.5 1.0 1.5 2.0 2.5 SOURCE VOLTAGE (V)
3.0
Figure 3. On Resistance vs. VS (VD); VDD = 5 V 10%
3.0 VDD = 2.7V 2.5 VDD = 3V TA = 25C IDS = 100mA
Figure 6. On Resistance vs. Source Voltage for Different Temperatures, VDD = 3 V
5
VDD = 5V
4
1.5 VDD = 3.6V 1.0
LEAKAGE (nA)
2.0
3
ID, IS (ON)
RON ()
VDD = 3.3V
2
1
0.5
05258-024
0
IS (OFF)
05258-016
0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 VS/VD (V)
-1 -40
-20
0
20
40
60
80
100
120
TEMPERATURE (C)
Figure 4. On Resistance vs. VS (VD); VDD = 2.7 V to 3.6 V
1.8 1.6 1.4 +85C +125C
Figure 7. Leakage vs. Temperature, VDD = 5 V
4.5 VDD = 3V 4.0 3.5 3.0
LEAKAGE (nA)
ON RESISTANCE ()
1.2 1.0 0.8 0.6 0.4 0.2 0 0 0.5 1.0 1.5 2.0 2.5 3.0 3.5 4.0 4.5 SOURCE VOLTAGE (V)
05258-014
ID, IS (ON)
2.5 2.0 1.5 1.0 0.5 0 -0.5 -40 -20 0 20 40 60 80 IS (OFF) 100 120
05258-015
+25C
-40C
VDD = 5V IDS = 100mA
5.0
TEMPERATURE (C)
Figure 5. On Resistance vs. Source Voltage for Different Temperatures, VDD = 5 V
Figure 8. Leakage vs. Temperature, VDD = 3 V
Rev. 0 | Page 7 of 16
05258-013
0.2
05258-012
0.5
VDD = 3V IDS = 100mA
ADG859
30 TA = 25C 25
CHARGE INJECTION (pC)
0 TA = 25C VDD = 3V/5V -20
20 VDD = 5V 15
ATTENUATION (dB)
05258-017
-40
-60
10
VDD = 3V
-80
5
-100
05258-020
0 0 0.5 1.0 1.5 2.0 2.5 VD (V) 3.0 3.5 4.0 4.5
5.0
-120 100
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
Figure 9. Charge Injection vs. Source Voltage
Figure 12. Off Isolation vs. Frequency
14
0 TA = 25C VDD = 3V/5V -20
VDD = 3.3V
12 10
ATTENUATION (dB)
05258-018
-40
TIME (ns)
8 6
tON
VDD = 5V VDD = 3.3V
-60
tOFF
4 VDD = 5V
-80
0 -40
-20
0
20
40
60
80
-120 100
1k
10k
100k
1M
10M
100M
TEMPERATURE (C)
FREQUENCY (Hz)
Figure 10. tON/tOFF Times vs. Temperature
Figure 13. Crosstalk vs. Frequency
0
0.20 0.18 TA = 25C
-2 TA = 25C VDD = 3V/5V -4
THD + N (%)
0.16 0.14 0.12 VDD = 3V, VS = 2V p-p 0.10 0.08 0.06 0.04 VDD = 5V, VS = 3V p-p
05258-022
ON RESPONSE (dB)
-6
-8
-10
05258-019
0.02 0 0 5k 10k FREQUENCY (Hz) 15k
-12 100
1k
10k
100k
1M
10M
100M
1G
20k
FREQUENCY (Hz)
Figure 11. Bandwidth
Figure 14. Total Harmonic Distortion + Noise
Rev. 0 | Page 8 of 16
05258-021
2
-100
ADG859
0 TA = 25C VDD = 3V/5V NO SUPPLY DECOUPLING
-20
-40
PSRR (dB)
-60
-80
-100
05258-023
-120 100
1k
10k
100k
1M
10M
100M
FREQUENCY (Hz)
Figure 15. PSRR
Rev. 0 | Page 9 of 16
ADG859 TEST CIRCUITS
V
IS (OFF) ID (OFF) S D A
ID (ON)
05258-003
05258-004
S VS
D IDS
VS
A
VD
VD
Figure 16. On Resistance
Figure 17. Off Leakage
Figure 18. On Leakage
VDD 0.1F VIN VDD VS S2 S1 D RL 50 GND VOUT CL 35pF VIN 50% 50% 50% 50%
90% VOUT
90%
IN VIN
Figure 19. Switching Times, tON, tOFF
VDD 0.1F
VDD VS S2 S1 D RL 50 GND VOUT
VIN
80% IN VIN CL 35pF VOUT
tBBM
tBBM
05258-007
Figure 20. Break-Before-Make Time Delay, tBBM
VDD 0.1F VIN (NORMALLY CLOSED SWITCH) VDD S2 VS D S1 IN VIN GND CL 1nF
05258-008
ON
OFF
NC VOUT
VIN (NORMALLY OPEN SWITCH)
VOUT
VOUT QINJ = CL x VOUT
Figure 21. Charge Injection
Rev. 0 | Page 10 of 16
05258-006
tON
tOFF
05258-005
NC
S
D
A
ADG859
VDD 0.1F NETWORK ANALYZER 50 VS VOUT
05258-009
VDD S1
NC S2 50
IN
D VIN GND RL 50
OFF ISOLATION = 20 LOG
VOUT VS
Figure 22. Off Isolation
VDD 0.1F NETWORK ANALYZER VOUT S1 RL 50 S2 50 VS IN GND
VDD
D
R 50
CHANNEL-TO-CHANNEL CROSSTALK = 20 LOG
VOUT VS
Figure 23. Channel-to-Channel Crosstalk
VDD 0.1F NETWORK ANALYZER 50 VS VOUT
05258-011
VDD S1
NC S2
IN
D VIN GND RL 50
INSERTION LOSS = 20 LOG
VOUT WITH SWITCH VOUT WITHOUT SWITCH
Figure 24. Bandwidth
Rev. 0 | Page 11 of 16
05258-010
ADG859 TERMINOLOGY
VDD Most positive power supply potential. IDD Positive supply current. GND Ground (0 V) reference. S Source terminal. Can be an input or an output. D Drain terminal. Can be an input or an output. IN Logic control input. VD (VS) Analog voltage on the D and S terminals. RON Ohmic resistance between the D and S terminals. RFLAT (ON) Flatness is defined as the difference between the maximum and minimum value of on resistance as measured. RON On resistance mismatch between any two channels. IS (Off) Source leakage current with the switch off. ID (Off) Drain leakage current with the switch off. ID, IS (On) Channel leakage current with the switch on. VINL Maximum input voltage for Logic 0. VINH Minimum input voltage for Logic 1. IINL (IINH) Input current of the digital input. CS (Off) Off switch source capacitance. Measured with reference to ground. CD (Off) Off switch drain capacitance. Measured with reference to ground. CD, CS (On) On switch capacitance. Measured with reference to ground. CIN Digital input capacitance. tON Delay time between the 50% and 90% points of the digital input and switch on condition. tOFF Delay time between the 50% and 90% points of the digital input and switch off condition. tBBM On or off time measured between the 80% points of both switches when switching from one to another. Charge Injection A measure of the glitch impulse transferred from the digital input to the analog output during on/off switching. Off Isolation A measure of unwanted signal coupling through an off switch. Crosstalk A measure of unwanted signal that is coupled through from one channel to another as a result of parasitic capacitance. -3 dB Bandwidth The frequency at which the output is attenuated by 3 dB. On Response The frequency response of the on switch. Insertion Loss The loss due to the on resistance of the switch. THD + N The ratio of harmonic amplitudes plus noise of a signal to the fundamental.
Rev. 0 | Page 12 of 16
ADG859 OUTLINE DIMENSIONS
1.70 1.66 1.50 0.26 0.19 0.11
4
0.20 MIN
6
5
1.30 1.20 1.10
TOP VIEW
1 2 3
1.70 1.65 1.50 0.10 NOM 0.05 MIN
BO TTOM VIEW 0.30 0.23 0.10
PIN 1 12 MAX 0.18 0.17 0.13 0.60 0.57 0.53 0.50 BSC 0.25 MAX 0.17 MIN
0.34 MAX 0.27 NOM
SEATING PLANE
Figure 25. 6-Lead Small Outline Transistor Package [SOT-66] (RY-6-1) Dimensions shown in millimeters
ORDERING GUIDE
Model ADG859YRYZ-REEL2 ADG859YRYZ-REEL7 2 ADG859BRYZ-REEL2 ADG859BRYZ-REEL72
1 2
Temperature Range -40C to +125C -40C to +125C -40C to +85C -40C to +85C
Package Description 6-Lead Small Outline Transistor Package (SOT-66) 6-Lead Small Outline Transistor Package (SOT-66) 6-Lead Small Outline Transistor Package (SOT-66) 6-Lead Small Outline Transistor Package (SOT-66)
Package Option RY-6-1 RY-6-1 RY-6-1 RY-6-1
Branding 1 02 02 04 04
Branding on this package is limited to two characters due to space constraints. Z = Pb-free part.
Rev. 0 | Page 13 of 16
ADG859 NOTES
Rev. 0 | Page 14 of 16
ADG859 NOTES
Rev. 0 | Page 15 of 16
ADG859 NOTES
(c) 2005 Analog Devices, Inc. All rights reserved. Trademarks and registered trademarks are the property of their respective owners. D05258-0-6/05(0)
Rev. 0 | Page 16 of 16


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